Sunday, 4 January 2015

Difference Between Burst mode and Cycle Stealing Mode of DMA



Parameter
Burst Mode of DMA
Cycle Stealing Mode of DMA
Definition
It is the DMA data transfer technique in which no. of data words are transferred continuously until whole data is not transferred.
It is the data transfer technique in which one data word is transferred and then control is returned to CPU.
Data Transfer
Data transfer Continues until whole data is not transferred.
Data is transferred Only when CPU is idle.
Speed
This is very fast data transfer technique and is used to transfer data for fast speed devices.
It is the slow data transfer technique as data is transferred only when CPU is idle
CPU Utilization
Low CPU Utilization because CPU remains idle until whole data is not transferred.
High CPU utilization because data is transferred when CPU has no task to perform.
Extra Overhead
No need to check CPU idleness
Extra Overhead because every time CPU has to be monitored for idle periods or slots.


Direct Memory Access (DMA)
Data Transfer Technique, in which data is transferred from memory to peripheral device without the involvement of CPU, is called Direct Mode of Addressing or DMA. During this process CPU remains idle and memory buses are under the control of DMA controller.
Whenever any device want to send data through DMA it sends a DMA request to DMA controller. After Receiving the DMA request from I/O Device DMA controller sends a Bus Grant (BG) signal to CPU to take the control of buses. As CPU receives BG signal from DMA controller, it terminates the execution of current instruction and places address bus, data bus and rear write lines into high impedance state. This high impedance state works as open circuit and output is disconnected.
Bus Grant (BG) signal is activated by CPU in response to BR signal to inform DMA controller that buses are in high impedance state and DMA controller can now take the control of buses.
DMA controller uses two techniques for data transfer:
Direct Mode of Data Transfer(Burst Mode).
Cycle Stealing Mode of Data Transfer

This Also Applicable to:
Introduction to DMA
Direct Memory Access(DMA)
Difference Between Burst mode and Cycle Stealing Mode of DMA
What is Cycle Stealing Mode of DMA?
What is Burst Mode of DMA?

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1 comment:

  1. Unknown6 January 2017 at 09:42

    Consider a system in which bus cycle takes 500 ns. Transfer of bus control in either direction, from processor to device or vice-versa, takes 250 ns.One of the IO device has data transfer rate of 75 KB/sec and employs DMA. Data are transferred one byte at a time.
    (a) Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus mastership prior to the start of block transfer and maintains control of the bus until the whole block is transferred. For how long would the device tie up with the bus when transferring a block of 256 bytes?�

    b) calculate the same for cycle stealing mode

    Please explain it in detail so that I can get the concept.

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